With each successive semiconductor technology generation, wafer diameters tend to increase and transistor sizes decrease, resulting in the need for an ever higher degree of accuracy and repeatability in wafer processing. Semiconductor substrate materials, such as silicon wafers, are processed by techniques which include the use of vacuum chambers. These techniques include non plasma applications such as electron beam evaporation, as well as plasma applications, such as sputter deposition, plasma-enhanced chemical vapor deposition (PECVD), resist strip, and plasma etch.
Plasma processing systems available today are among those semiconductor fabrication tools which are subject to an increasing need for improved accuracy and repeatability. An important success metric for plasma processing systems is increased uniformity, which includes uniformity of process results on a semiconductor substrate surface as well as uniformity of process results of a succession of wafers processed with nominally the same input parameters. Continuous improvement of on-wafer uniformity is desirable. Among other things, this calls for plasma chambers with improved uniformity, consistency and self diagnostics.
For example, poly-silicon gate etching is driving towards smaller and smaller critical dimension uniformity (CDU) to be achieved across a substrate of about 300 mm in diameter. Such a variation could be due to radial variation in substrate temperature near the edge, plasma chemistry or density, an overhanging edge ring, or other constraints. The CDU requirements are expected to become more stringent with the continuing reduction in node size.